Thresholding task control blocks for staging and destaging

ABSTRACT

For thresholding task control blocks (TCBs) for staging and destaging, a first tier of TCBs are reserved for guaranteeing a minimum number of TCBs for staging and destaging for storage ranks An additional number of requested TCBs are apportioned from a second tier of TCBs to each of the storage ranks based on a scaling factor that is calculated at predefined time intervals.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates in general computing systems, and moreparticularly to, systems and methods for thresholding task controlblocks (TCBs) for staging and destaging.

2. Description of the Related Art

In today's society, computer systems are commonplace. Computer systemsmay be found in the workplace, at home, or at school. Computer systemsmay include data storage systems, or disk storage systems, to processand store data. Contemporary computer storage systems are known todestage storage tracks from cache to long-term storage devices so thatthere is sufficient room in the cache for data to be written. Whendestaging the storage tracks, contemporary storage systems destage thestorage tracks from each rank in the cache when the cache is becomingfull or the global pressure factor is high. That is, storage tracks aredestaged from each rank when the global pressure factor is high, eventhough some ranks in the cache may only be storing a small number ofstorage tracks with respect to the amount of storage space allocated tothese ranks Moreover, destaging tasks assist with starting the destagingof storage tracks to the storage systems.

SUMMARY OF THE INVENTION

In one embodiment, a method is provided for thresholding task controlblocks (TCBs) for staging and destaging using at least one processordevice in a computing environment. In one embodiment, by way of exampleonly, a first tier of TCBs are reserved for guaranteeing a minimumnumber of TCBs for staging and destaging for storage ranks An additionalnumber of requested TCBs are apportioned from a second tier of TCBs toeach of the storage ranks based on a scaling factor that is calculatedat predefined time intervals.

In another embodiment, a computer system is provided for thresholdingtask control blocks (TCBs) for staging and destaging using at least oneprocessor device, in a computing environment. The computer systemincludes a computer-readable medium and a processor in operablecommunication with the computer-readable medium. In one embodiment, byway of example only, the processor uses a first tier of TCBs forreserving a guaranteed minimum number of TCBs for storage ranks, andapportions an additional number of the TCBs from a second tier of TCBsthat are requested to one of the storage ranks based on a scaling factorthat is calculated at predefined time intervals.

In a further embodiment, a computer program product is provided forthresholding task control blocks (TCBs) for staging and destaging usingat least one processor device, in a computing environment. Thecomputer-readable storage medium has computer-readable program codeportions stored thereon. The computer-readable program code portionsinclude a first executable portion that uses a first tier of TCBs forreserving a guaranteed minimum number of TCBs for storage ranks, andapportions an additional number of the TCBs from a second tier of TCBsthat are requested to one of the storage ranks based on a scaling factorthat is calculated at predefined time intervals.

In addition to the foregoing exemplary method embodiment, otherexemplary system and computer product embodiments are provided andsupply related advantages. The foregoing summary has been provided tointroduce a selection of concepts in a simplified form that are furtherdescribed below in the Detailed Description. This Summary is notintended to identify key features or essential features of the claimedsubject matter, nor is it intended to be used as an aid in determiningthe scope of the claimed subject matter. The claimed subject matter isnot limited to implementations that solve any or all disadvantages notedin the background.

BRIEF DESCRIPTION OF THE DRAWINGS

In order that the advantages of the invention will be readilyunderstood, a more particular description of the invention brieflydescribed above will be rendered by reference to specific embodimentsthat are illustrated in the appended drawings. Understanding that thesedrawings depict only typical embodiments of the invention and are nottherefore to be considered to be limiting of its scope, the inventionwill be described and explained with additional specificity and detailthrough the use of the accompanying drawings, in which:

FIG. 1 illustrates is a block diagram showing an exemplary hardwarestructure for smoothing destaging tasks in which aspects of the presentinvention may be realized;

FIG. 2 is a block diagram showing an exemplary hardware structure of adata storage system in a computer system according to the presentinvention in which aspects of the present invention may be realized;

FIG. 3 is a flowchart illustrating an exemplary method for thresholdingtask control blocks (TCBs) for staging and destaging in which aspects ofthe present invention may be realized; and

FIG. 4 is a flow chart illustrating an additional exemplary method forcomputing staging and destaging task control blocks (TCBs) forallocation to ranks in which aspects of the present invention may berealized.

DETAILED DESCRIPTION OF THE DRAWINGS

In one embodiment, data storage and retrieval systems receives requeststo write information to one or more secondary storage devices, andrequests to retrieve information from those one or more secondarystorage devices. Upon receipt of a write request, computing systemsstore information received from a host computer in a data cache. In oneembodiment, a copy of that information is also stored in NVS. The NVSmay be used as temporary storage for data in the process of beingwritten to secondary storage devices so that data will be available inthe event that the host computer systems or the data storage andretrieval systems fail during the process of storing data. Upon receiptof a read request, the system recalls information from the one or moresecondary storage devices and moves that information to the data cacheand then to the host. In one embodiment, a storage controller maycontrol one or more storage devices that may include hard disks, tapes,etc. A cache may also be maintained by the storage controller, where thecache may comprise a high speed storage that is accessible more quicklyin comparison to certain other storage devices, such as, hard disks,tapes, etc. However, the total amount of storage capacity of the cachemay be relatively smaller in comparison to the storage capacity ofcertain other storage devices, such as, hard disks, etc., that arecontrolled by the storage controller. The cache may be comprised of oneor more of random access memory (RAM), the NVS, read cache, write cache,etc., that may interoperate with each other in different ways. The NVSmay be comprised of a battery backed-up random access memory and mayallow write operations to be performed at a high speed. The storagecontroller may manage Input/output (I/O) requests from networked hoststo the plurality of storage devices.

In one embodiment, the data storage and retrieval systems may becontinuously moving information to and from storage devices, to and fromthe data cache and in certain circumstances to and from the NVS. Taskcontrol blocks (“TCBs”) are used to manage the movement of data within adata storage and retrieval system and between, for example, a hostcomputer and the data storage and retrieval system. TCBs are passedbetween various processes within the data storage and retrieval systemto clear space for and manage the movement of the data to be stored orretrieved.

In one embodiment, the computer storage systems are known to destagestorage tracks from cache to long-term storage devices so that there issufficient room in the cache for data to be written. In one embodiment,Wise Ordering for Writes (WOW), which are lists that are used forexploiting both temporal and spatial locality by ordering the listaccording to the storage location to which an associated task or requestis directed, add a destaging, or simply “destaging tasks” one at a time.In one embodiment, destaging tasks are used to manage the movement ofdata within a data storage and retrieval system and between a hostcomputer and the data storage and retrieval system. In other words, thedestage TCBs are tasks that destage tracks from a cache to storage(e.g., disk drives). The destaging TCBs may be a command to start thedestaging of the storage track.

Caching techniques implemented by the storage controller assist inhiding I/O latency. The cache may comprise a high speed memory orstorage device used to reduce the effective time required to read datafrom or write data to a lower speed memory or device. The cache is usedfor rapid access to data staged from external storage to service readdata access requests, and to provide buffering of modified data. Writerequests are written to the cache and then written (i.e., destaged) tothe external storage devices. NVS was introduced for allowing fastwrites. In the absence NVS, data writes may have to be synchronouslywritten (i.e., destaged) directly to the storage device to ensureconsistency, correctness, and persistence. Otherwise failure of theserver may cause data stored in the cache to be lost. The rate of hostwrites exceeds the speed of the storage devices, hence without NVS therate of data transfer to storage devices may be slow. In one embodiment,the NVS enables fast writes to cache where the writes are mirrored toand stored safely in the NVS until the writes can be transferred to theexternal storage device. The data is destaged from cache later (anddiscarded from NVS) in an asynchronous fashion thus hiding the writelatency of the storage device. The cache and NVS typically store updatesintended for multiple storage devices. To guarantee continued lowlatency for writes, the data in the NVS may have to be drained so as toensure that there is always some empty space for incoming writes;otherwise, follow-on writes may become effectively synchronous, whichmay adversely impact the response time for host writes. On the otherhand, if the writes are drained too aggressively, then the benefits ofwrite caching may not be fully exploited since the average amount of NVScache utilized may be low.

In one embodiment, the TCBs may be a data structure in the operatingsystem kernel containing the information needed to manage a particularprocess. The storage controllers may move information to and fromstorage devices, and to and from the cache (including the NVS) by usingTCBs to manage the movement of data. When a write request issues from ahost computer to a storage controller, a TCB may be allocated from theoperating system code. The TCB is used to maintain information about thewrite process from beginning to end as data to be written is passed fromthe host computer through the cache to the secondary storage devices. Ifthe cache is full, the TCB may be queued until existing data in thecache can be destaged (i.e., written to secondary storage devices), inorder to free up space. The destage operations may involve the moving ofinformation from cache to a RAID rank and destaged TCBs may be allocatedfor performing the destage operations.

However, a storage controller is limited number of TCBs (e.g., 12thousand). Also, the storage controller may have a large number ofstorage ranks (“ranks”) (e.g., 400). Some of the ranks can saturate thedisks by smaller number of destage/stage tasks. For example, spinnersonly need 40 destage/stage TCBs to drive the disks to saturation.However, solid disk drives (SSD) ranks and other types of ranks may needmore destage/stage tasks to saturate the disks. For example, certainranks (e.g., bluehawk rank) may take up to 120 stage/destage TCBs to getmaximum input/output per seconds (IOPS). If there are a significantamount of certain types of ranks (e.g., the bluehawk ranks) and each isrunning at a maximum rate then the box can easily max out on the numberof TCBs. Thus, a need exists for allocating, thresholding, and/orapportioning the TCBs (e.g., destaging TCBs and staging TCBs) to thevarious ranks to ensure computing efficiency.

Thus, in one embodiment, by way of example only, the present inventionprovides a solution for thresholding task control blocks (TCBs) forstaging and destaging using at least one processor device in a computingenvironment. In one embodiment, by way of example only, a first tier ofTCBs are reserved for guaranteeing a minimum number of TCBs for stagingand destaging for storage ranks An additional number of requested TCBsare apportioned from a second tier of TCBs to each of the storage ranksbased on a scaling factor that is calculated at predefined timeintervals.

In one embodiment, the present invention provides for allocation of theTCB for the various ranks by providing 2 tiers of TCBs. A first tier(e.g., tier 0) guarantees a minimum number of TCBs to every rank, and asecond tier (e.g., tier 1) of TCBs requests are apportioned by rankbased on a scaling factor, which is recalculated at short intervals, andthose ranks over their limit are reduced. First, two tiers of TCBs areused; a first tier and a second tier. Each rank reserve both stage TCBsand destage TCBs in the first tier (e.g., tier 0) whether the rank is inan idle state and/or a running state. In this way, when a rank startsrunning, the rank may easily use and/or request (e.g., grab) some of thereserved and guaranteed TCBs without having to wait for other ranks togive up (e.g., release and free up) some their TCBs.

In one embodiment, each of the running ranks (e.g., those ranksoperating in the running/operating state) computes how many stage TCBsand/or destage TCBs they need based on rank type, staging and/or destageoperations, read requests and destages needed based on NVS usage. Eachrank receives and/or is assigned a minimum number of TCBs from the firsttier (e.g., tier 0). If a rank computes that it needs more than thisnumber, then the TCBs are allocated from the second tier (e.g., tier 1).Periodically, the present invention adds up all of the requests from allof the ranks that need to be satisfied and/or allocated from the secondtier (e.g., tier 1). A scaling factor is then computed based on numberof requests from the second tier (e.g., tier 1) and the actual number ofTCBs in the second tier (e.g., tier 1). In one embodiment, the presentinvention multiplies the scaling factor by the number of requests fromeach rank for TCBs from the second tier (e.g., tier 1). This is theactual number of TCBs (e.g., the maximum number of TCBs) that each rankshould use and be allocated. If a rank is running TCBs above thismaximum number of TCBs than the present invention (e.g., the rank) frees(e.g., releases) at least one or more of the TCBs (e.g., the stagingTCBs and/or destaging TCBs) to get to this maximum number of TCBs. If arank is running TCBs below this maximum number of TCBs than the presentinvention (e.g., the rank) may allocate more of the TCBs (staging TCBsand/or destaging TCBs).

To handle and/or prevent a burst of allocating the TCBs where a firsthalf/portion of the ranks are in the running state with the maximumnumber of TCBs are TCBs=X, and a second portion/half of the ranks startRunning so the maximum number of TCBs are TCBs=X/2). In one embodiment,the present invention does not allow the second half of the ranks toincrease TCBs, until the first half of the ranks have decreased TCBs.

Turning to FIG. 1, a block diagram of one embodiment of a system 100 forsmoothing destaging tasks. At least in the illustrated embodiment,system 100 comprises a memory 110 coupled to a cache 120 and a processor130 via a bus 140 (e.g., a wired and/or wireless bus).

Memory 110 may be any type of memory device known in the art ordeveloped in the future. Examples of memory 110 include, but are notlimited to, an electrical connection having one or more wires, aportable computer diskette, a hard disk, a random access memory (RAM),an erasable programmable read-only memory (EPROM or Flash memory), anoptical fiber, a portable compact disc read-only memory (CD-ROM), anoptical storage device, a magnetic storage device, or any suitablecombination of the foregoing. In the various embodiments of memory 110,storage tracks are capable of being stored in memory 110. Furthermore,each of the storage tracks can be destaged to memory 110 from cache 120when data is written to the storage tracks.

Cache 120, in one embodiment, comprises a write cache partitioned intoone or more ranks 1210, where each rank 1210 includes one or morestorage tracks. Cache 120 may be any cache known in the art or developedin the future.

During operation, the storage tracks in each rank 1210 are destaged tomemory 110 in a foreground destaging process after the storage trackshave been written to. That is, the foreground destage process destagesstorage tracks from the rank(s) 1210 to memory 110 while a host (notshown) is actively writing to various storage tracks in the ranks 1210of cache 120. Ideally, a particular storage track is not being destagedwhen one or more hosts desire to write to the particular storage track,which is known as a destage conflict.

In various embodiments, processor 130 comprises or has access to adestage management module 1310, which comprises computer-readable codethat, when executed by processor 130, causes processor 130 to performthe present invention. In the various embodiments, processor 130 isconfigured to calculate the number of destaging tasks according toeither a standard time interval and a variable recomputed destaging taskinterval.

In various other embodiments, processor 130 is configured to either rampup and/or ramp down the destaging tasks and the current number ofdestaging task.

In various other embodiments, processor 130 is configured to eitherdecrement the current number of destaging tasks by a value of one, ifgreater than the desired number of destaging tasks and/or increment thecurrent number of destaging tasks by a value of one, if less than thedesired number of destaging tasks. Subsequent to either decrementing orincrementing, the processor 130 is configured to recalculate the currentnumber of destaging tasks after reaching either the standard timeinterval and the variable recomputed destaging task interval that isselected for the calculating.

In one embodiment, each rank 1210 is allocated the same predeterminedamount of storage space in cache 120. In another embodiment, at leasttwo ranks 1210 are allocated different predetermined amounts of storagespace in cache 120. In still another embodiment, each rank 1210 isallocated a different predetermined amount of storage space in cache120. In each of these embodiments, each predetermined amount of storagespace in cache 120 is not to exceed a predetermined maximum amount ofstorage space.

In various embodiments, processor 130 is configured to allocate thepredetermined maximum amount of storage space on a percentage basis. Inone embodiment, the predetermined maximum amount of storage spaceallocated to a respective rank 1210 is in the range of about one percentto about twenty-five percent (1%-50%) of the total storage capacity ofcache 120. In another embodiment, the predetermined maximum amount ofstorage space allocated to a respective rank 1210 is twenty-five percent(25%) of the total storage capacity of cache 120.

In various other embodiments, processor 130 is configured to allocatethe predetermined maximum amount of storage space on a storage trackbasis. That is, each rank 1210 is limited to a predetermined maximumnumber of storage tracks, which can vary from rank to rank.

Processor 130, in various embodiments, is configured to monitor eachrank 1210 in cache 120 and determine the amount of storage tracks eachrespective rank 1210 is storing with respect to its allocated amount ofstorage space in cache 120. In one embodiment, processor 130 isconfigured to determine the amount of storage tracks in each respectiverank 1210 on a percentage basis. That is, processor 130 is configured tomonitor each rank 1210 and determine the percentage each respective rank1210 is using to store storage tracks with respect to the individualallocations of the total storage space in cache 120.

In another embodiment, processor 130 is configured to determine thenumber of storage tracks in each respective rank 1210. Specifically,processor 130 is configured to monitor each rank 1210 and determine thenumber of storage tracks each respective rank 1210 is using to storestorage tracks with respect to the individual allocations of the totalstorage space in cache 120.

Processer 130, in various embodiments, is configured to destage storagetracks from each respective rank 1210 until a predetermined minimumamount of storage space remains in each respective rank 1210 withrespect to its predetermined allocated amount of storage space in cache120, and then cease to or no longer destage storage tracks from ranks1210 that are using less than or equal to the predetermined minimumamount of storage space. In one embodiment, processor 130 is configuredto destage storage tracks from each rank 1210 until a predeterminedpercentage (e.g., thirty percent (30%)) of the predetermined amount ofstorage space in cache 120 is reached. In another embodiment, processor130 is configured to destage storage tracks from each rank 1210 until apredetermined minimum number of storage tracks are reached.

For example, in an embodiment that includes ten (10) ranks 1210 in whicheach rank 1210 is allocated 10 percent (10%) of the total storage spaceof cache 120 and the predetermined minimum amount of storage tracks isthirty percent (30%), processor 130 will continue to destage storagetracks from each rank 1210 that includes more than three percent (3%) ofthe total storage capacity of cache 120 (i.e., 10%×30% =3%). Once aparticular rank 1210 has reached the three percent threshold, processor130 will cease to or no longer destage storage tracks from theparticular storage track until the particular rank 1210 is using morethan the predetermined amount of storage tracks is (i.e., three percentof the total storage capacity of cache 120 in this example).

Processor 130, in various embodiments, is configured to utilize aformula to determine the number of destage tasks to utilize whendestaging storage tracks from each respective rank 1210. In the variousembodiments, the formula is based on the global pressure factor of cache120 as it relates to each respective rank 1210. That is, the number ofdestage tasks utilized to destage storage tracks from each respectiverank 1210 is proportional to the amount of its allocated storage spaceeach respective rank 1210 is multiplied by the global pressure factor,which is a factor determined by a collective percentage of the totalamount of storage space in cache 120 being utilized by ranks 1210.

In one embodiment, the formula includes a predetermined maximum numberdestage tasks (e.g., forty (40) destage tasks) that is utilized when aparticular rank 1210 is utilizing a large amount of its allocatedstorage space and the global pressure factor is high. In anotherembodiments, the formula includes a default of zero (0) destage tasksthat is utilized when a particular rank 1210 is utilizing an amount ofstorage space less than or equal to the predetermined minimum amountwith respect to its allocated amount of storage space in cache 120.

Processor 130, in various embodiments, is configured to select tracksfor destaging from a least recently used (LRU) list and move theselected tracks to a destaging wait list. The selected tracks, via theprocessor 130, are grouped and destaged from the destaging wait list.

FIG. 2 is an exemplary block diagram 200 showing a hardware structure ofa data storage system in a computer system according to the presentinvention. Host computers 210, 220, 225, are shown, each acting as acentral processing unit for performing data processing as part of a datastorage system 200. The hosts (physical or virtual devices), 210, 220,and 225 may be one or more new physical devices or logical devices toaccomplish the purposes of the present invention in the data storagesystem 200. In one embodiment, by way of example only, a data storagesystem 200 may be implemented as IBM® System Storage™ DS8000™. A Networkconnection 260 may be a fibre channel fabric, a fibre channel point topoint link, a fibre channel over ethernet fabric or point to point link,a FICON or ESCON I/O interface, any other I/O interface type, a wirelessnetwork, a wired network, a LAN, a WAN, heterogeneous, homogeneous,public (i.e. the Internet), private, or any combination thereof. Thehosts, 210, 220, and 225 may be local or distributed among one or morelocations and may be equipped with any type of fabric (or fabricchannel) (not shown in FIG. 2) or network adapter 260 to the storagecontroller 240, such as Fibre channel, FICON, ESCON, Ethernet, fiberoptic, wireless, or coaxial adapters. Data storage system 200 isaccordingly equipped with a suitable fabric (not shown in FIG. 2) ornetwork adapter 260 to communicate. Data storage system 200 is depictedin FIG. 2 comprising storage controller 240 and storage 230. In oneembodiment, the embodiments described herein may be applicable to avariety of types of computing architectures, such as in a virtualcluster management environment using the various embodiments asdescribed herein.

To facilitate a clearer understanding of the methods described herein,storage controller 240 is shown in FIG. 2 as a single processing unit,including a microprocessor 242, system memory 243 and nonvolatilestorage (“NVS”) 216, which will be described in more detail below. It isnoted that in some embodiments, storage controller 240 is comprised ofmultiple processing units, each with their own processor complex andsystem memory, and interconnected by a dedicated network within datastorage system 200. Storage 230 may be comprised of one or more storagedevices, such as storage arrays, which are connected to storagecontroller 240 by a storage network.

In some embodiments, the devices included in storage 230 may beconnected in a loop architecture. Storage controller 240 manages storage230 and facilitates the processing of write and read requests intendedfor storage 230. The system memory 243 of storage controller 240 storesthe operation software 250, program instructions and data, which theprocessor 242 may access for executing functions and method stepsassociated with managing storage 230, and executing the steps andmethods of the present invention. As shown in FIG. 2, system memory 243may also include or be in communication with a cache 245 for storage230, also referred to herein as a “cache memory”, for buffering “writedata” and “read data”, which respectively refer to write/read requestsand their associated data. In one embodiment, cache 245 is allocated ina device external to system memory 243, yet remains accessible bymicroprocessor 242 and may serve to provide additional security againstdata loss, in addition to carrying out the operations as describedherein.

In some embodiments, cache 245 is implemented with a volatile memory andnon-volatile memory and coupled to microprocessor 242 via a local bus(not shown in FIG. 2) for enhanced performance of data storage system200. The NVS 216 included in data storage controller is accessible bymicroprocessor 242 and serves to provide additional support foroperations and execution of the present invention as described in otherfigures. The NVS 216, may also referred to as a “persistent” cache, or“cache memory” and is implemented with nonvolatile memory that may ormay not utilize external power to retain data stored therein. The NVSmay be stored in and with the cache 245 for any purposes suited toaccomplish the objectives of the present invention. In some embodiments,a backup power source (not shown in FIG. 2), such as a battery, suppliesNVS 216 with sufficient power to retain the data stored therein in caseof power loss to data storage system 200. In certain embodiments, thecapacity of NVS 216 is less than or equal to the total capacity of cache245.

Storage 230 may be physically comprised of one or more storage devices,such as storage arrays. A storage array is a logical grouping ofindividual storage devices, such as a hard disk. In certain embodiments,storage 230 is comprised of a JBOD (Just a Bunch of Disks) array or aRAID (Redundant Array of Independent Disks) array. A collection ofphysical storage arrays may be further combined to form a rank, whichdissociates the physical storage from the logical configuration. Thestorage space in a rank may be allocated into logical volumes, whichdefine the storage location specified in a write/read request.

In one embodiment, the storage system as shown in FIG. 2 may include alogical volume, or simply “volume,” may have different kinds ofallocations. Storage 230 a, 230 b and 230 n are shown as ranks in datastorage system 200, and are referred to herein as rank 230 a, 230 b and230 n. Ranks may be local to data storage system 200, or may be locatedat a physically remote location. In other words, a local storagecontroller may connect with a remote storage controller and managestorage at the remote location. Rank 230 a is shown configured with twoentire volumes, 234 and 236, as well as one partial volume 232 a. Rank230 b is shown with another partial volume 232 b. Thus volume 232 isallocated across ranks 230 a and 230 b. Rank 230 n is shown as beingfully allocated to volume 238—that is, rank 230 n refers to the entirephysical storage for volume 238. From the above examples, it will beappreciated that a rank may be configured to include one or more partialand/or entire volumes. Volumes and ranks may further be divided intoso-called “tracks,” which represent a fixed block of storage. A track istherefore associated with a given volume and may be given a given rank.

The storage controller 240 may include a destage management module 255,a task control block (TCB) allocation module 257, a TCB TIER module 258,and a calculation module 259. The destage management module 255, the TCBallocation module 257, the TCB TIER module 258, and the calculationmodule 259 may be one complete module functioning simultaneously orseparate modules. The destage management module 255, the TCB allocationmodule 257, the TCB TIER module 258, and the calculation module 259 mayhave some internal memory (not shown) and may store unprocessed,processed, or “semi-processed” data. The destage management module 255,the TCB allocation module 257, the TCB TIER module 258, and thecalculation module 259 may work in conjunction with each and everycomponent of the storage controller 240, the hosts 210, 220, 225, andother storage controllers 240 and hosts 210, 220, and 225 that may beremotely connected via the storage fabric 260. Both the destagemanagement module 255, the TCB allocation module 257, the TCB TIERmodule 258, and the calculation module 259 may be structurally onecomplete module or may be associated and/or included with otherindividual modules. The destage management module 255, the TCBallocation module 257, the TCB TIER module 258, and the calculationmodule 259 may also be located in the cache 245 or other components ofthe storage controller 240.

The storage controller 240 includes a control switch 241 for controllingthe fiber channel protocol to the host computers 210, 220, 225, amicroprocessor 242 for controlling all the storage controller 240, anonvolatile control memory 243 for storing a microprogram (operationsoftware) 250 for controlling the operation of storage controller 240,cache 245 for temporarily storing (buffering) data, and buffers 244 forassisting the cache 245 to read and write data, a control switch 241 forcontrolling a protocol to control data transfer to or from the destagemanagement module 255, the TCB allocation module 257, the TCB TIERmodule 258, and the calculation module 259 in which information may beset. Multiple buffers 244 may be implemented to assist with the methodsand steps as described herein.

In one embodiment, the host computers or one or more physical or virtualdevices, 210, 220, 225 and the storage controller 240 are connectedthrough a network adaptor (this could be a fibre channel) 260 as aninterface i.e., via a switch called “fabric.” The microprocessor 242 maycontrol the memory 243 to store command information from the clusterhost/node device (physical or virtual) 210 and information foridentifying the cluster host/node device (physical or virtual) 210. Thecontrol switch 241, the buffers 244, the cache 245, the operatingsoftware 250, the microprocessor 242, memory 243, NVS 216, the destagemanagement module 255, the TCB allocation module 257, the TCB TIERmodule 258, and the calculation module 259 are in communication witheach other and may be separate or one individual component(s). Also,several, if not all of the components, such as the operation software250 may be included with the memory 243. Each of the components withinthe devices shown may be linked together and may be in communicationwith each other for purposes suited to the present invention.

Turning to FIG. 3, a flowchart illustrates an exemplary method 300 forthresholding task control blocks (TCBs) for staging and destaging isdepicted. The method 300 begins (step 302). The method 300 uses a firsttier of TCBs for reserving a guaranteed minimum number of TCBs forstorage ranks (step 304). The method 300 apportions an additional numberof the TCBs from a second tier of TCBs that are requested to one of thestorage ranks based on a scaling factor that is calculated at predefinedtime intervals (step 306). The method 300 ends (step 308).

In one embodiment, the first tier of TCBs (e.g., Tier 0) are in an idlestate and the second tier of TCBs (e.g., Tier 1) are running The firsttier of idle TCBs (e.g., Idle(Tier0)) allows any rank to become nonidle. In one embodiment, there may be only a few TCBs in the idle poolof TCBs. Any TCBs that are not in use are reserved (not used) forguaranteeing a minimum number of TCBs for storage ranks (e.g., 2KTCBs/owned ranks)

In one embodiment, for the second tier of TCBs (e.g., Tier 1) of runningTCBs, the present invention determines and identifies a total number ofTCB requests from the second tier of TCBs (e.g., Tier 1). The presentinvention scales the individual rank requests for TCBs from the secondtier of TCBs (e.g., Tier 1) by a ratio of a total number of TCBs in thesecond tier of TCBs (e.g., Tier 1) divided by a total number of TCBsrequests from tier 1 (e.g., as Scaling Ratio=Total number of TCBs/TotalTCB Requests). The TCBs requests are summed from the second tier of TCBs(e.g., Tier 1) for all the storage running ranks (e.g., e.g. 4K TCBs aresummed for the running ranks The present invention saves a maximumnumber of TCBs for each rank based on the first tier of TCBs (e.g., Tier0) and TCBs needed from the second tier of TCBs (e.g., Tier 1) that isthen multiplied by the scaling ratio.

Any rank running over the maximum number of TCBs computed releasesand/or frees stage and/or destage TCBs. Ranks with fewer than themaximum number of TCBs computed may allocate more stage TCBs and/ordestage TCBs in order to operate at the maximum number of TCBs. Thepresent invention handle a burst (i.e. first half the Ranks are Running,Max TCBx==X, second half of the Ranks start Running, Max TCBs==X/2). Thepresent invention does not allow the second half of the ranks toincrease the TCBs, until the first half of the ranks have decreasedTCBs.

Turning to FIG. 4, a flowchart illustrates an additional exemplarymethod 400 for computing staging and destaging task control blocks(TCBs) for allocation to ranks is depicted. The method 400 begins (step402). The method 400 computes stage requests for a rank (step 404). Themethod 400 computes destage requests for a rank (step 406). The method400 computes a maximum stage TCBs and/or maximum destage TCBs for a rank(step 408). The method 400 ends (step 410). Further details forcomputing staging and destaging task control blocks (TCBs) forallocation to ranks are provided below.

In one embodiment the present invention provides a solution forcomputing the stage TCB requests for a rank. The stage requests arecomputed as a number of stages in progress plus (add) the number ofwaiting ranks for stage TCBs. In one embodiment the present inventionprovides a solution for computing destage TCB requests for a rank basedon a total NVS usage and a rank's use of the NVS space.

In one embodiment, the present invention periodically computes a maximumstage TCBs and/or maximum destage TCBs for a rank. In one embodiment,the first tier of TCBs (e.g., Tier 0) requests are computed as a numberof the first tier of TCBs (e.g., Tier 0) divided by a number of theranks For all ranks, if either of stage TCBs and/or destage TCBs aregreater than the maximum stage TCBs and/or maximum destage TCBs, thenpresent invention sets the ranks to conform to the maximum stage TCBsand/or maximum destage TCBs (e.g., setting the ranks to false). Thepresent invention sets the ranks requested number of stage TCBs and/ordestage TCBs to a minimum number of the rank requests and the first tierof TCBs (e.g., Tier 0) requests. The total number of the stage TCBsand/or destage TCBs requests are updated by adding a rank's number ofthe stage TCBs and/or destage TCBs requests. If any rank does notconform to the maximum stage TCBs and/or maximum destage TCBs then ifsome ranks are running with stage/destage TCBs at more than the currentmaximum stage TCBs and/or maximum destage TCBs then the presentinvention pauses and/or does not proceed. When all ranks conform to themax than the algorithm will be repeated again and new ranks can retrieveand/or obtain more stage TCBs and/or destage TCBs.

In one embodiment, the present invention computes the second tier ofTCBs (e.g., Tier 1) requests by adding all requests for TCBs and thensubtracts number of the first tier of TCBs (e.g., Tier 0). The TCBscaling factor is computed as the minimum of at least 100 and/or thenumber of the second tier of TCBs (e.g., Tier 1) divided by the totalnumber of the second tier of TCBs (e.g., Tier 1) requests.

For all ranks, the present invention sets the maximum stage TCBs and/ormaximum destage TCBs as the first tier of TCBs (e.g., Tier 0) requestsplus (+) the number of requests that can be satisfied from the secondtier of TCBs (e.g., Tier 1) TCBs using the scaling factor (e.g., maxTCBs=tier 0 requests +(tier1 requests*scaling factor)).

In one embodiment, provides a solution for thresholding task controlblocks (TCBs) for staging and destaging using at least one processordevice in a computing environment. In one embodiment, by way of exampleonly, a first tier of TCBs are reserved for guaranteeing a minimumnumber of TCBs for staging and destaging for storage ranks An additionalnumber of requested TCBs are apportioned from a second tier of TCBs toeach of the storage ranks based on a scaling factor that is calculatedat predefined time intervals. In one embodiment, the present inventiondetermines a number of TCBs for one of staging and destaging that arerequired by one of the storage ranks in a running state based a storagerank type, staging operation and/or destaging operations, read requests,and/or destage operations needed based on non-volatile storage (NVS)usage. In one embodiment, provides a solution for computing the scalingfactor by using requests from each of the storage ranks and a totalnumber of TCBs in the second tier of TCBs.

The scaling factor is multiplied by a total number of the requests fromeach of the storage ranks for the TCBs from the second tier of TCBs fordetermining a maximum number of the TCBs to be allocated to each of thestorage ranks In one embodiment, the present invention frees and/orreleases at least one of the TCBs by those storage ranks executing anumber of the TCBs above the maximum number of the TCBs in order toexecute only the maximum number of the TCBs. An additional number of theTCBs are apportioned from the second tier of TCBs until reaching themaximum number of the TCBs to those storage ranks executing a number ofthe TCBs below the maximum number of the TCBs.

In one embodiment, the present invention prevents at least a firstportion of the storage ranks from increasing the TCBs until a secondportion of storage ranks have decreased the TCBs for preventing a burst.In one embodiment, the TCBs of the second portion of storage ranks mustdecrease by half of the running TCBs of the second portion prior to thefirst portion of storage ranks increasing any number of the TCBs on thefirst portion of storage ranks

As will be appreciated by one of ordinary skill in the art, aspects ofthe present invention may be embodied as a system, method, or computerprogram product. Accordingly, aspects of the present invention may takethe form of an entirely hardware embodiment, an entirely softwareembodiment (including firmware, resident software, micro-code, etc.) oran embodiment combining software and hardware aspects that may allgenerally be referred to herein as a “circuit,” “module,” or “system.”Furthermore, aspects of the present invention may take the form of acomputer program product embodied in one or more computer-readablemedium(s) having computer readable program code embodied thereon.

Any combination of one or more computer-readable medium(s) may beutilized. The computer-readable medium may be a computer-readable signalmedium or a physical computer-readable storage medium. A physicalcomputer readable storage medium may be, for example, but not limitedto, an electronic, magnetic, optical, crystal, polymer, electromagnetic,infrared, or semiconductor system, apparatus, or device, or any suitablecombination of the foregoing. Examples of a physical computer-readablestorage medium include, but are not limited to, an electrical connectionhaving one or more wires, a portable computer diskette, a hard disk,RAM, ROM, an EPROM, a Flash memory, an optical fiber, a CD-ROM, anoptical storage device, a magnetic storage device, or any suitablecombination of the foregoing. In the context of this document, acomputer-readable storage medium may be any tangible medium that cancontain, or store a program or data for use by or in connection with aninstruction execution system, apparatus, or device.

Computer code embodied on a computer-readable medium may be transmittedusing any appropriate medium, including but not limited to wireless,wired, optical fiber cable, radio frequency (RF), etc., or any suitablecombination of the foregoing. Computer code for carrying out operationsfor aspects of the present invention may be written in any staticlanguage, such as the “C” programming language or other similarprogramming language. The computer code may execute entirely on theuser's computer, partly on the user's computer, as a stand-alonesoftware package, partly on the user's computer and partly on a remotecomputer or entirely on the remote computer or server. In the latterscenario, the remote computer may be connected to the user's computerthrough any type of network, or communication system, including, but notlimited to, a local area network (LAN) or a wide area network (WAN),Converged Network, or the connection may be made to an external computer(for example, through the Internet using an Internet Service Provider).

Aspects of the present invention are described above with reference toflowchart illustrations and/or block diagrams of methods, apparatus(systems) and computer program products according to embodiments of theinvention. It will be understood that each block of the flowchartillustrations and/or block diagrams, and combinations of blocks in theflowchart illustrations and/or block diagrams, can be implemented bycomputer program instructions. These computer program instructions maybe provided to a processor of a general purpose computer, specialpurpose computer, or other programmable data processing apparatus toproduce a machine, such that the instructions, which execute via theprocessor of the computer or other programmable data processingapparatus, create means for implementing the functions/acts specified inthe flowchart and/or block diagram block or blocks.

These computer program instructions may also be stored in acomputer-readable medium that can direct a computer, other programmabledata processing apparatus, or other devices to function in a particularmanner, such that the instructions stored in the computer-readablemedium produce an article of manufacture including instructions whichimplement the function/act specified in the flowchart and/or blockdiagram block or blocks. The computer program instructions may also beloaded onto a computer, other programmable data processing apparatus, orother devices to cause a series of operational steps to be performed onthe computer, other programmable apparatus or other devices to produce acomputer implemented process such that the instructions which execute onthe computer or other programmable apparatus provide processes forimplementing the functions/acts specified in the flowchart and/or blockdiagram block or blocks.

The flowchart and block diagrams in the above figures illustrate thearchitecture, functionality, and operation of possible implementationsof systems, methods and computer program products according to variousembodiments of the present invention. In this regard, each block in theflowchart or block diagrams may represent a module, segment, or portionof code, which comprises one or more executable instructions forimplementing the specified logical function(s). It should also be notedthat, in some alternative implementations, the functions noted in theblock may occur out of the order noted in the figures. For example, twoblocks shown in succession may, in fact, be executed substantiallyconcurrently, or the blocks may sometimes be executed in the reverseorder, depending upon the functionality involved. It will also be notedthat each block of the block diagrams and/or flowchart illustration, andcombinations of blocks in the block diagrams and/or flowchartillustration, can be implemented by special purpose hardware-basedsystems that perform the specified functions or acts, or combinations ofspecial purpose hardware and computer instructions.

While one or more embodiments of the present invention have beenillustrated in detail, one of ordinary skill in the art will appreciatethat modifications and adaptations to those embodiments may be madewithout departing from the scope of the present invention as set forthin the following claims.

What is claimed is:
 1. A method for thresholding task control blocks(TCBs) for staging and destaging by a processor device in a computingenvironment, the method comprising: using a first tier of TCBs forreserving a guaranteed minimum number of TCBs for storage ranks; andapportioning an additional number of the TCBs from a second tier of TCBsthat are requested to one of the storage ranks based on a scaling factorthat is calculated at predefined time intervals.
 2. The method of claim1, further including determining a number of TCBs for one of staging anddestaging that are required by one of the storage ranks in a runningstate based on one of a storage rank type, one of a staging operationand destaging operation, read requests, and destage operations neededbased on non-volatile storage (NVS) usage.
 3. The method of claim 1,further including computing the scaling factor by using a plurality ofrequests from each of the storage ranks and a total number of TCBs inthe second tier of TCBs.
 4. The method of claim 3, further includingmultiplying the scaling factor by a total number of the plurality ofrequests from each of the storage ranks for the TCBs from the secondtier of TCBs for determining a maximum number of the TCBs to beallocated to each of the storage ranks.
 5. The method of claim 4,further including freeing at least one of the TCBs by those storageranks executing a number of the TCBs above the maximum number of theTCBs in order to execute only the maximum number of the TCBs.
 6. Themethod of claim 5, further including apportioning the additional numberof the TCBs from the second tier of TCBs until reaching the maximumnumber of the TCBs to those storage ranks executing a number of the TCBsbelow the maximum number of the TCBs.
 7. The method of claim 1, furtherincluding preventing at least a first portion of the storage ranks fromincreasing the TCBs until a second portion of storage ranks havedecreased the TCBs for preventing a burst.
 8. A system for thresholdingtask control blocks (TCBs) for staging and destaging in a computingenvironment, the system comprising: at least one processor deviceoperable in the computing environment, wherein processor device: uses afirst tier of TCBs for reserving a guaranteed minimum number of TCBs forstorage ranks, and apportions an additional number of the TCBs from asecond tier of TCBs that are requested to one of the storage ranks basedon a scaling factor that is calculated at predefined time intervals. 9.The system of claim 8, wherein the at least one processor devicedetermines a number of TCBs for one of staging and destaging that arerequired by one of the storage ranks in a running state based on one ofa storage rank type, one of a staging operation and destaging operation,read requests, and destage operations needed based on non-volatilestorage (NVS) usage.
 10. The system of claim 8, wherein the at least oneprocessor device computes the scaling factor by using a plurality ofrequests from each of the storage ranks and a total number of TCBs inthe second tier of TCBs.
 11. The system of claim 10, wherein the atleast one processor device multiplies the scaling factor by a totalnumber of the plurality of requests from each of the storage ranks forthe TCBs from the second tier of TCBs for determining a maximum numberof the TCBs to be allocated to each of the storage ranks
 12. The systemof claim 11, wherein the at least one processor device frees at leastone of the TCBs by those storage ranks executing a number of the TCBsabove the maximum number of the TCBs in order to execute only themaximum number of the TCBs.
 13. The system of claim 12, wherein the atleast one processor device apportions the additional number of the TCBsfrom the second tier of TCBs until reaching the maximum number of theTCBs to those storage ranks executing a number of the TCBs below themaximum number of the TCBs.
 14. The system of claim 8, wherein the atleast one processor device prevents at least a first portion of thestorage ranks from increasing the TCBs until a second portion of storageranks have decreased the TCBs for preventing a burst.
 15. A computerprogram product for thresholding task control blocks (TCBs) for stagingand destaging in a computing environment by at least one processordevice, the computer program product comprising a non-transitorycomputer-readable storage medium having computer-readable program codeportions stored therein, the computer-readable program code portionscomprising: a first executable portion that uses a first tier of TCBsfor reserving a guaranteed minimum number of TCBs for storage ranks; anda second executable portion that apportions an additional number of theTCBs from a second tier of TCBs that are requested to one of the storageranks based on a scaling factor that is calculated at predefined timeintervals.
 16. The computer program product of claim 15, furtherincluding a third executable portion that determines a number of TCBsfor one of staging and destaging that are required by one of the storageranks in a running state based on one of a storage rank type, one of astaging operation and destaging operation, read requests, and destageoperations needed based on non-volatile storage (NVS) usage.
 17. Thecomputer program product of claim 15, further including a thirdexecutable portion that computes the scaling factor by using a pluralityof requests from each of the storage ranks and a total number of TCBs inthe second tier of TCBs.
 18. The computer program product of claim 17,further including a fourth executable portion that multiplies thescaling factor by a total number of the plurality of requests from eachof the storage ranks for the TCBs from the second tier of TCBs fordetermining a maximum number of the TCBs to be allocated to each of thestorage ranks
 19. The computer program product of claim 18, furtherincluding a fifth executable portion that performs one of: freeing atleast one of the TCBs by those storage ranks executing a number of theTCBs above the maximum number of the TCBs in order to execute only themaximum number of the TCBs, and apportioning the additional number ofthe TCBs from the second tier of TCBs until reaching the maximum numberof the TCBs to those storage ranks executing a number of the TCBs belowthe maximum number of the TCBs.
 20. The computer program product ofclaim 16, further including a third executable portion that prevents atleast a first portion of the storage ranks from increasing the TCBsuntil a second portion of storage ranks have decreased the TCBs forpreventing a burst.